1. Field of the Invention
The present invention relates to a liquid crystal display (LCD) device, and more particularly, to an In-Plane Switching (IPS) mode liquid crystal display (LCD) device and a method for fabricating the same.
2. Discussion of the Related Art
A liquid crystal display (LCD) device is one type of flat display wherein the LCD device changes optical anisotropy by applying an electric field to liquid crystal having both the fluidity of liquid and the optical characteristics of crystal. Recently, the LCD device has been widely used because of its advantageous characteristics such as low power consumption, thin profile, high resolution, and suitableness for a large size, as compared with a related art cathode ray tube (CRT).
The LCD device has various modes based on the properties of liquid crystal used in the device and pattern structure. Specifically, the LCD device may be categorized as a Twisted Nematic (TN) mode for controlling liquid crystal direction by applying a voltage after arrangement of liquid crystal director twisted at 90°, a multi-domain mode for obtaining a wide viewing angle by dividing one pixel into several domains, an Optically Compensated Birefringence (OCB) mode for compensating a phase change of light according to a progressing direction of light by forming a compensation film on an outer surface of a substrate, an In-Plane Switching (IPS) mode for forming an electric field parallel to two substrates by forming two electrodes on any one substrate, and a Vertical Alignment (VA) mode for arranging a longitudinal (major) axis of liquid crystal molecule vertical to a plane of an alignment layer by using negative type liquid crystal and vertical alignment layer.
Among the types of LCD devices, the IPS mode LCD device generally includes a color filter substrate and a thin film transistor array substrate facing each other, and a liquid crystal layer formed between the two substrates. The color filter substrate includes a black matrix layer for preventing light leakage, and an R/G/B color filter layer for realizing various colors on the black matrix layer. The thin film transistor array substrate includes gate and data lines to define a pixel region, a switching device formed at a crossing point of the gate and data lines, and common and pixel electrodes alternately formed to generate an electric field parallel to the two substrates.
Hereinafter, a related art IPS mode LCD device and a method for fabricating the same will be described with reference to the accompanying drawings FIG. 1-5.
In FIG. 1, a thin film transistor array substrate includes a gate line 12, a data line 15, a thin film transistor TFT, a common line 25, a plurality of common electrodes 24, a plurality of pixel electrodes 17, and a capacitor electrode 26. At this time, the gate line 12 is formed at one direction on the thin film transistor array substrate, and the data line 15 is formed perpendicular to the gate line 12 to define a pixel region. Also, the thin film transistor TFT is formed at a crossing portion of the gate and data lines 12 and 15. Then, the common line 25 is formed in parallel to the gate line 12 within the pixel region. The plurality of common electrodes 24 extending from the common line 25 are formed in parallel to the data line 15. Also, the plurality of pixel electrodes 17 are connected to the thin film transistor TFT, and each pixel electrode 17 is provided in parallel between the common electrodes 24. The capacitor electrode 26 extended from the pixel electrode 17 is overlapped with the common line 25.
In addition, the thin film transistor TFT is comprised of a gate electrode 12a extending from the gate line 12, a gate insulating layer (not shown) formed on an entire surface of the thin film transistor array substrate including the gate electrode 12a, a semiconductor layer formed on the gate insulating layer above the gate electrode, and source and drain electrodes 15a and 15b, respectively, extending from the data line 15, and formed at both sides of the semiconductor layer 14.
At this time, the common line 25 is formed as one with the common electrode 24, and the gate line 12 is formed as one with the gate electrode.
The common line and the gate line are formed of a low-resistance metal material, at the same time. Also, any one of the common electrodes is overlapped with the data line, whereby it functions as a black matrix layer to improve an aperture ratio.
The pixel electrodes 17, extending from the common line 25 are formed of a transparent conductive metal material having great transmittance, for example, indium-tin-oxide (ITO), wherein each pixel electrode 17 alternates with the common electrode 24. Also, the pixel electrode 17 is in contact with the drain electrode of the thin film transistor TFT, whereby the pixel electrode 17 receives a voltage.
Also, on the common line 25, there is the capacitor electrode 26 formed as one with the pixel electrode 17, thereby forming a storage capacitor.
In the related art IPS mode LCD device, as shown in FIG. 2, if 5V is applied to the common electrode 24, and 0V is applied to the pixel electrode 17, an equipotential surface is formed in parallel to the electrodes at the portions right on the electrodes, and the equipotential surface is formed perpendicular to the electrodes at the portion between the two electrodes. Thus, since an electric field is perpendicular to the equipotential surface, a horizontal electric field is formed between the common electrode 24 and the pixel electrode 17, a vertical electric field is formed on the respective electrodes, and both the horizontal and vertical electric fields are formed in the edge of the electrode.
An alignment of liquid crystal molecules in the related art IPS mode LCD device is controlled with the electric field. For example, as shown in FIG. 3A, if a sufficient voltage is applied to liquid crystal molecules 31 initially aligned at the same direction as a transmission axis of one polarizing sheet, long axes of the liquid crystal molecules 31 are aligned in parallel to the electric field. In case the dielectric anisotropy of the liquid crystal is negative, short axes of the liquid crystal molecules are aligned in parallel to the electric field.
More specifically, first and second polarizing sheets are formed on outer surfaces of the thin film transistor array substrate and the color filter substrate bonded to each other, wherein the transmission axes of the first and second polarizing sheets are perpendicular to each other. Also, an alignment layer formed on the lower substrate is rubbed in parallel to the transmission axis of one polarizing sheet, whereby it is displayed on a normally black mode.
That is, if the voltage is not provided to the device, as shown in FIG. 3A, the liquid crystal molecules 31 are aligned to display the black state. Meanwhile, as shown in FIG. 3B, if the voltage is provided to the device, the liquid crystal molecules 31 are aligned in parallel to the electric field, thereby displaying the white state.
Meanwhile, as show in FIG. 1, the common electrode 24 and the pixel electrode 17 be formed in an alternating pattern in a straight line, or, as shown in FIG. 4, a common electrode 124 and a pixel electrode 117 may be formed in a zigzag pattern.
As shown in FIG. 4, in a case in which the common electrode 124 and the pixel electrode 117 are formed in a zigzag pattern, liquid crystal molecules are aligned in two directions, thereby forming a two-domain IPS structure. The two-domain structure achieves a wide viewing angle, as compared with the mono-domain IPS structure. The two-domain IPS structure is referred to as an S-IPS (Super-IPS) structure.
At this time, a data line 115 may be formed in a straight line, or may be formed in parallel with the common electrode 124 and the pixel electrode 117. However, in a case in which the data line is formed in a straight line, the device has a relatively low aperture ratio, as compared with the mono-domain IPS structure. That is, as shown in FIG. 4, the common electrode 124 is formed below the data line 115, and is formed in the zigzag pattern to be parallel with the pixel electrode 117, thereby deteriorating the aperture ratio.
To overcome this problem, a data line 215 may be directly bent as shown in FIG. 5, for improvement of the aperture ratio. In this case, another problem occurs of the increase of resistance because the length of the data line increases.
In detail, as shown in FIG. 5, the data line 215 is formed perpendicular to a gate line 212 to define a unit pixel region. At this time, the data line 215 is formed in the zigzag pattern to be parallel with a common electrode 224 and a pixel electrode 217. Thus, it is not required to from the common electrode 224 in parallel with the pixel electrode 217 below the data line 215, so that a light-shielding area is changed to an open area, thereby improving the aperture ratio.
However, as described above, in case the data line 215 is formed in the zigzag type, the total length of the data line increases, thereby increasing the line resistance.